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| ANSALDO Ansaldo Trasporti s.p.a. Unita' Semiconduttori Via N. Lorenzi 8 - I 16152 GENOVA - ITALY Tel. int. +39/(0)10 6556549 - (0)10 6556488 Fax Int. +39/(0)10 6442510 Tx 270318 ANSUSE I - PHASE CONTROL THYRISTOR AT875LT Repetitive voltage up to Mean on-state current Surge current 4400 V 2200 A 25.2 kA FINAL SPECIFICATION apr 97 - ISSUE : 01 Symbol Characteristic Conditions Tj [C] 120 120 120 Value Unit BLOCKING V V V I I RRM RSM DRM RRM DRM Repetitive peak reverse voltage Non-repetitive peak reverse voltage Repetitive peak off-state voltage Repetitive peak reverse current Repetitive peak off-state current V=VRRM V=VDRM 4400 4500 4400 200 200 V V V mA mA 120 120 CONDUCTING I I I V V r T (AV) T (AV) TSM Mean on-state current Mean on-state current Surge on-state current I t On-state voltage Threshold voltage On-state slope resistance 180 sin, 50 Hz, Th=55C, double side cooled 180 sin, 50 Hz, Tc=85C, double side cooled sine wave, 10 ms without reverse voltage On-state current = 2000 A 25 120 120 120 2200 1720 25.2 3175 x1E3 2 1.3 0.334 A A kA As V V mohm I t T T(TO) T SWITCHING di/dt dv/dt td tq Q rr I rr I I H L Critical rate of rise of on-state current, min. Critical rate of rise of off-state voltage, min. Gate controlled delay time, typical Circuit commutated turn-off time, typical Reverse recovery charge Peak reverse recovery current Holding current, typical Latching current, typical From 75% VDRM up to 1600 A, gate 10V 5ohm Linear ramp up to 70% of VDRM VD=100V, gate source 40V, 10 ohm , tr=.5 s dV/dt = 20 V/s linear up to 75% VDRM di/dt=-20 A/s, I= 1050 A VR= 50 V VD=5V, gate open circuit VD=12V, tp=30s 120 120 25 120 25 25 200 1000 3 400 A/s V/s s s C A 300 1000 mA mA GATE V I V V I V P P GT GT GD FGM FGM RGM GM G Gate trigger voltage Gate trigger current Non-trigger gate voltage, min. Peak gate voltage (forward) Peak gate current Peak gate voltage (reverse) Peak gate power dissipation Average gate power dissipation VD=12V VD=12V VD=2000 V 25 25 120 3.5 400 0.8 30 10 10 V mA V V A V W W Pulse width 100 s 150 2 MOUNTING R R T F th(j-h) th(c-h) j Thermal impedance, DC Thermal impedance Operating junction temperature Mounting force Mass ORDERING INFORMATION : AT875LT S 44 standard specification Junction to heatsink, double side cooled Case to heatsink, double side cooled 9.5 2 -30 / 120 40.0 / 50.0 1150 C/kW C/kW C kN g VDRM&VRRM/100 AT875LT PHASE CONTROL THYRISTOR FINAL SPECIFICATION apr 97 - ISSUE : 01 ANSALDO DISSIPATION CHARACTERISTICS SQUARE WAVE Th [C] 120 110 100 90 80 70 120 30 60 90 60 50 0 500 1000 1500 IF(AV) [A] 2000 180 DC 2500 3000 PF(AV) [W] 7000 6000 90 180 120 DC 5000 60 4000 30 3000 2000 1000 0 0 500 1000 1500 IF(AV) [A] 2000 2500 3000 AT875LT PHASE CONTROL THYRISTOR FINAL SPECIFICATION apr 97 - ISSUE : 01 ANSALDO DISSIPATION CHARACTERISTICS SINE WAVE Th [C] 120 110 100 90 30 80 60 70 60 90 120 180 50 0 500 1000 1500 IF(AV) [A] 2000 2500 3000 PF(AV) [W] 7000 180 6000 90 120 5000 60 4000 3000 2000 1000 0 0 500 30 1000 1500 IF(AV) [A] 2000 2500 3000 AT875LT PHASE CONTROL THYRISTOR FINAL SPECIFICATION apr 97 - ISSUE : 01 ANSALDO ON-STATE CHARACTERISTIC Tj = 120 C SURGE CHARACTERISTIC Tj = 120 C 7000 6000 5000 30 25 On-state Current [A] 20 ITSM [kA] 0.6 1.1 1.6 2.1 2.6 3.1 3.6 4000 3000 2000 1000 0 On-state Voltage [V] 15 10 5 0 1 10 n cycles 100 TRANSIENT THERMAL IMPEDANCE DOUBLE SIDE COOLED 10.0 9.0 8.0 7.0 Zth j-h [C/kW] 6.0 5.0 4.0 3.0 2.0 1.0 0.0 0.001 0.01 0.1 t[s] 1 10 100 Cathode terminal type DIN 46244 - A 4.8 - 0.8 Gate terminal type AMP 60598 - 1 Distributed by All the characteristics given in this data sheet are guaranteed only with uniform clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm and roughness < 2 m. In the interest of product improvement ANSALDO reserves the right to change any data given in this data sheet at any time without previous notice. If not stated otherwise the maximum value of ratings (simbols over shaded background) and characteristics is reported. |
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